CMOS ternary flip-flops and their applications - Computers and Digital Techniques [see also IEE Proceedings-Computers and Digital Techniques], IEE
نویسندگان
چکیده
We demonstrate a procedure for designing CMOS ternary circuits based on a discussion of threshold comparison, transmission, and union Qperations. Using some basic CMOS ternary circuits, we design CMOS ternary flip-flops (tri-flops) such as ternary latch and various master/slave triflops. These tri-flops have two additional binary inverse outputs with a fixed threshold. As examples of sequential circuit design using these triflops, we present a modulo-9 up-counter and a mixed valued counter.
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